AIM: To Study of DSP kit or introduction of DSP Kit
Apparatus Used:
1-DSP Kit - (DSK TMS320C6713)-Texas instrument make- 01 No
2-Computer system - (P-4 ) -01 No.
3-Power Supply - Adapter provided with Kit- 01 No
4-USB Cable - Provided with kit - 01 No
About DSP Kit:
The C6713. DSK builds on TI’s industry-leading line of low cost, easy-to-use DSP
Starter Kit (DSK) development boards. The high-performance board features the
TMS320C6713 floating-point DSP. Capable of performing 1350 million floating-point
operations per second (MFLOPS), the C6713 DSP makes the C6713 DSK the most
powerful DSK development board.
The following checklist details items that are shipped with the C6711 DSK kit.
#TMS320C6713 DSK TMS320C6713 DSK development board
#Other hardware External 5VDC power supply IEEE 1284 compliant male-to-female cable
#CD-ROM Code Composer Studio DSK tools
The C6713 DSK has a TMS320C6713 DSP on board that allows full-speed verification of
Code with Code Composer Studio. The C6713 DSK provides:
#A USB Interface
# SD RAM and ROM
#An analog interface circuit for Data conversion (AIC)
#An I/O port
#Embedded JTAG emulation support
High-Performance Stereo Codec
#90-dB SNR Multi bit Sigma-Delta ADC (A-weighted at 48 kHz)
#100-dB SNR Multi bit Sigma-Delta DAC (A-weighted at 48 kHz)
#1.42 V . 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core
Voltages
#2.7 V . 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages
#8-kHz . 96-kHz Sampling-Frequency Support
Software Control Via TI McBSP-Compatible Multi protocol Serial Port
#I 2 C-Compatible and SPI-Compatible Serial-Port Protocols
#Glueless Interface to TI McBSPs
#Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface
#I 2 S-Compatible Interface Requiring Only One McBSP for both ADC and DAC
#Standard I 2 S, MSB, or LSB Justified-Data Transfers
#16/20/24/32-Bit Word Lengths
The C6713DSK has the following features:
The 6713 DSK is a low-cost standalone development platform that enables customers to
Evaluate and develop applications for the TI C67XX DSP family. The DSK also serves as
a hardware reference design for the TMS320C6713 DSP. Schematics, logic equations
And application notes are available to ease hardware development and reduce time to
market.
The DSK uses the 32-bit EMIF for the SDRAM (CE0) and daughter card expansion
Interface (CE2 and CE3). The Flash is attached to CE1 of the EMIF in 8-bit mode.
An on-board AIC23 codec allows the DSP to transmit and receive analog signals.
McBSP0 is used for the codec control interface and McBSP1 is used for data. Analog
audio I/O is done through four 3.5mm audio jacks that correspond to microphone input,
line input, line output and headphone output. The codec can select the microphone or the
line input as the active input. The analog output is driven to both the line out (fixed gain)
and headphone (adjustable gain) connectors. McBSP1 can be re-routed to the
expansion connectors in software.
A programmable logic device called a CPLD is used to implement glue logic that ties the
board components together. The CPLD has a register based user interface that lets the
user configure the board by reading and writing to the CPLD registers. The registers
reside at the midpoint of CE1.
The DSK includes 4 LEDs and 4 DIP switches as a simple way to provide the user with
interactive feedback. Both are accessed by reading and writing to the CPLD registers.
An included 5V external power supply is used to power the board. On-board voltage
regulators provide the 1.26V DSP core voltage, 3.3V digital and 3.3V analog voltages.
A voltage supervisor monitors the internally generated voltage, and will hold the board in
reset until the supplies are within operating specifications and the reset button is
released. If desired, JP1 and JP2 can be used as power test points for the core and I/O
power supplies.
Code Composer communicates with the DSK through an embedded JTAG emulator with
a USB host interface. The DSK can also be used with an external emulator through the
external JTAG connector.
TMS320C6713 DSP Features
Highest-Performance Floating-Point Digital Signal Processor (DSP):
#Eight 32-Bit Instructions/Cycle
#32/64-Bit Data Word
#300-, 225-, 200-MHz (GDP), and 225-, 200-, 167-MHz (PYP) Clock Rates
#3.3-, 4.4-, 5-, 6-Instruction Cycle Times
#2400/1800, 1800/1350, 1600/1200, and 1336/1000 MIPS /MFLOPS
#Rich Peripheral Set, Optimized for Audio
#Highly Optimized C/C++ Compiler
#Extended Temperature Devices Available
Advanced Very Long Instruction Word (VLIW) TMS320C67x. DSP Core
#Eight Independent Functional Units:
#Two ALUs (Fixed-Point)
#Four ALUs (Floating- and Fixed-Point)
#Two Multipliers (Floating- and Fixed-Point)
#Load-Store Architecture With 32 32-Bit General-Purpose Registers
#Instruction Packing Reduces Code Size
#All Instructions Conditional
